Silicon photonics has moved from a long-promised technology to a mainstream option inside 400G and 800G pluggable modules. The interesting question is no longer whether it works. It is which parts of a module actually get cheaper, by what mechanism, and under what conditions the saving disappears.
This article answers that question first, then covers what the shift means for the passive fiber plant you have to buy alongside the optics.
- Silicon photonics lowers the optical portion of module cost by replacing individually assembled discrete parts with a single lithographically defined photonic integrated circuit (PIC).
- It does not remove the laser, the DSP, the driver, the TIA or the optical packaging. At 800G, those items - not the photonics - usually dominate the bill of materials.
- The saving scales with volume and lane count. It is largest in short-reach parallel single-mode interfaces such as DR4 and DR8, and smallest in low-volume, long-reach or wavelength-multiplexed products.
- 800G is cheaper per transmitted bit than 400G mainly because the DSP, package, connector and cabling channel are shared across twice as many lanes - not because the optics themselves halve in price.
- A cheaper module only produces a cheaper network if the fiber plant does not have to be rebuilt to accept it.
What silicon photonics actually is
Silicon photonics uses photonic integrated circuits built on silicon-on-insulator wafers to perform optical functions: waveguiding, splitting, modulation, wavelength multiplexing and detection. Because the structures are defined by lithography on CMOS-compatible 200 mm or 300 mm lines, hundreds of identical optical circuits are produced in one pass instead of being assembled part by part.
Two limits matter for any cost discussion:
- Silicon does not lase. Light still comes from a III-V source - indium phosphide or a quantum-dot laser - that is externally coupled, flip-chip attached or heterogeneously bonded. The most expensive material in the module remains outside the silicon process.
- A PIC is not a module. A finished transceiver still contains a DSP or retimer, modulator drivers, transimpedance amplifiers, thermal management, a fiber-coupling structure and a hermetic or semi-hermetic package.
Silicon photonics is therefore best understood as an integrated optical platform that removes a class of assembly steps, not as a replacement for the whole transceiver.
Where the money goes in a 400G or 800G module
| Cost block | What it covers | Effect of silicon photonics |
|---|---|---|
| Photonic circuit | Waveguides, modulators, multiplexers, germanium photodetectors | Large reduction. Wafer-scale replication, part count falls sharply |
| Laser source | III-V laser die, isolator, wavelength control | Little to none. Still a III-V component with its own yield and supply constraints |
| DSP or retimer | PAM4 signal processing, FEC, equalization | None directly. Often the single largest line item at 800G |
| Electrical ICs | Drivers, TIAs, control | Indirect. Co-design with the PIC can reduce parasitics and part count |
| Packaging and fiber coupling | Alignment, attach, fiber array, hermeticity, thermal path | Mixed. Fewer alignments overall, but coupling into submicron silicon waveguides is demanding |
| Test and qualification | Wafer test, module test, burn-in, interoperability | Significant reduction. Optical test can move to wafer level, so bad die are discarded before packaging |
Five mechanisms that lower cost per bit
- Part-count reduction. Functions that once required separately aligned components become one lithographic layout. Every eliminated active alignment removes labor, equipment time and a yield loss opportunity.
- Wafer-scale amortization. Mask and process development is a fixed cost spread across the whole wafer run, so unit cost falls with cumulative volume in a way that discrete assembly does not.
- Earlier test. Known-good-die screening on the wafer prevents expensive packaging and laser attach from being spent on parts that will fail.
- Lane scaling. Going from four lanes to eight adds waveguides and modulators on the same die. It does not double the number of separately handled optical assemblies.
- Supply chain narrowing. Compound-semiconductor content is concentrated in the laser instead of being spread across modulators, detectors and multiplexers.
Why 800G costs less per bit than 400G
The per-bit improvement in an 800G port comes mostly from sharing, and the sharing extends past the module:
- One DSP, one package, one cage, one heatsink and one management interface now serve 800 Gb/s instead of 400 Gb/s.
- One switch port, one front-panel slot and one power budget serve twice the traffic. Switch and power infrastructure per bit is often the larger saving.
- One cabling channel carries twice the capacity. An 800G-DR8 link over a 16-fiber trunk moves twice the traffic of a 400G-DR4 link over 8 fibers, using one termination event, one test record and one patch position.
Breakout changes the arithmetic again: a single 800G-DR8 port split into two 400G-DR4 links replaces two 400G ports on the switch, which is usually the cheaper way to serve 400G endpoints from a modern spine. This is where module economics, switch radix and cabling design stop being separate budgets - a point we develop further in our guide to silicon photonic modules and 400G fiber cabling.
Two cautions on published numbers. First, transceiver street prices move quickly and vary by volume, region and qualification status, so any figure quoted in an article is stale before it is read. Second, "cost per bit" is only comparable when reach class, lane count and form factor are held constant. Compare quotations for specific part numbers at your own volume, not headline averages.
When silicon photonics is not the cheaper choice
Integration is a volume-and-lane-count argument. Where those conditions are absent, the older approaches often win:
- Very short links inside a rack. Passive or active copper cables and AOCs remain cheaper and lower-power for a few metres. Our comparison of copper and fiber in AI data centers covers where the crossover sits.
- Long reach and high per-lane performance. EML and thin-film lithium niobate modulators still hold advantages in bandwidth and output power for some LR, ER and coherent applications, where silicon's modulation efficiency and insertion loss are harder constraints.
- Low-volume or niche products. Below a certain shipment volume, fixed mask and qualification costs are never amortized and a discrete build is cheaper.
- Thermally constrained deployments. Some silicon modulators need active thermal control. Where power and cooling are the binding constraint, a lower module price can be the wrong optimization.
- When the fiber plant has to change. If moving to a parallel single-mode interface means new trunks, new panels and a maintenance window, the recabling can exceed the module saving in the first year.
Total cost of ownership, not module price
Four items outside the purchase order usually move more money than the module discount:
- Power per bit. Module power is a recurring operating cost multiplied by cooling. Industry roadmaps now treat linear pluggable optics (LPO) and linear receive optics (LRO) - which reduce or remove the retimer DSP - as the next significant step in module power reduction; the Ethernet Alliance Ethernet Roadmap tracks where these fit against 800G and 1.6T. Form-factor power envelopes are defined in the OSFP MSA specifications.
- Port density. Higher-radix switching reduces the number of switches, optics and cables needed for the same fabric. This compounds; module price does not.
- Rework and downtime. A polarity error or a contaminated ferrule discovered during turn-up costs engineering hours at exactly the moment they are most expensive.
- Upgrade disruption. Fiber installed once and reused across three module generations is dramatically cheaper than fiber installed three times.
What this means for the fiber plant
A cheaper module does not create a working link. The transceiver has to be matched to fiber type, connector interface, polarity and loss budget.
Single-mode becomes the default
Most short-reach 400G and 800G silicon photonic interfaces are parallel single-mode. G.652.D fiber, cabled as OS2 and specified in ITU-T Recommendation G.652, supports DR, FR and LR interfaces over the distances found in a data hall or campus, and does not tie the installation to one multimode generation. For background on the fiber itself, see our overview of single-mode fiber characteristics.
The connector must match the interface, not the line rate
| Interface | Lanes | Typical module connector | Fibers in use |
|---|---|---|---|
| 400G-DR4 | 4 × 100G | MPO-12 | 8 |
| 400G-FR4 / LR4 | 4 wavelengths, 1 fiber pair | Duplex LC | 2 |
| 800G-DR8 | 8 × 100G | MPO-16 | 16 |
| 800G-2×DR4 | 2 × 4 × 100G | Two MPO-12 | 16 |
| 800G-2×FR4 | 2 × 4 wavelengths | Two duplex LC | 4 |
Two modules both labelled 800G can therefore need completely different cable assemblies. Interface definitions come from the IEEE 802.3 work: P802.3df for 400G and 800G at 100G per lane, and P802.3dj for 200G per lane and 1.6T. Form factor is a separate axis again - see our notes on the QSFP-DD DR4 module and on 800G OSFP, and on the 16-fiber MPO used for 800G.
A worked example
Consider a 400G-DR4 leaf-to-spine link, 120 m, running through two patch panels:
- Channel: module → equipment cord → panel → OS2 12-fiber MPO trunk → panel → equipment cord → module. That is four mated MPO pairs.
- Fiber attenuation: 120 m at roughly 0.35 dB/km at 1310 nm gives about 0.04 dB. Negligible at this length.
- Connector loss: four mated pairs at 0.35 dB typical gives 1.4 dB; at a 0.5 dB worst-case grade, 2.0 dB.
- Against a DR-class channel allowance in the region of 4 dB, the design has margin - but a fifth patching point at worst-case loss would consume most of it.
The general rule the example illustrates: at 400G and 800G, the number of mated pairs matters more than the length. Verify the allowance against the specific module datasheet and IEEE clause rather than a generic figure, and specify low-loss assemblies where the channel has three or more mated pairs.
Polarity and cleanliness
Polarity has to be planned across the whole channel - trunks, cassettes, harnesses, breakouts and equipment cords together - because a channel assembled from individually correct components can still be wrong end to end. Document the polarity method before ordering, not after the trunks arrive.
Contamination is the other failure mode that scales badly with lane count, because an MPO ferrule concentrates 12 or 16 fibers in one end face and a single particle can take down a lane. Inspect before mating, clean when inspection fails, reinspect, and treat the sequence as an installation step rather than a troubleshooting step. Our MPO inspection and cleaning guide covers the practical procedure and the IEC 61300-3-35 acceptance criteria.
FAQ
Q: Is A Silicon Photonic Module Always Cheaper Than An EML-Based Module?
A: No. It is usually cheaper in high-volume, short-reach, high-lane-count products such as DR4 and DR8. For long reach, low volume or applications needing high per-lane optical performance, EML and other architectures can still be more economical.
Q: What Is The Most Expensive Part Of An 800G Module?
A: Typically the DSP, followed by the laser and the optical packaging. Silicon photonics addresses the photonic circuit and part of the assembly cost, which is why module prices fall but do not collapse.
Q: Does Silicon Photonics Reduce Power Consumption?
A: Indirectly. Integration shortens electrical paths and reduces parasitics, but the retimer DSP dominates module power at 800G. The larger power reductions on current roadmaps come from linear pluggable and linear receive optics, which reduce or remove that DSP.
Q: Do Silicon Photonic Modules Need Special Fiber?
A: No special fiber type, but most short-reach designs are parallel single-mode, so they need OS2 rather than multimode, with the correct fiber count and connector for the interface.
Q: Can I Reuse My Existing 400G MPO-12 Trunks For 800G?
A: Sometimes. An 800G-2×DR4 module using two MPO-12 interfaces can reuse them. An 800G-DR8 module using a single MPO-16 cannot, because the lane mapping and fiber count differ.
Q: Is 800G Twice The Price Of 400G?
A: Generally no. Because the DSP, package, switch port and cabling channel are shared across twice the capacity, cost per bit falls even when the unit price of the module rises.
Q: How Do I Compare Vendor Cost Claims Fairly?
A: Fix the reach class, lane count and form factor, then compare on a per-port basis including module, switch port, power and cabling. Comparing an 800G-DR8 against a 400G-FR4 tells you very little.
Bottom line
Silicon photonics is genuinely changing the cost structure of 400G and 800G optics, but it does so by compressing one part of the bill of materials - the photonic circuit and the assembly steps around it - while leaving the laser, the DSP and the packaging largely intact. The compounding savings show up at the system level: fewer ports, fewer cables, lower power per bit, and a fiber plant that survives the next upgrade.
That last item is the one buyers control most directly. The module is a three-year decision; the trunk is a ten-year one.
Getting the passive side right
Custom cabling is worth specifying when the channel involves breakout, mixed connector formats, tight loss budgets or a phased migration - cases where a catalogue assembly will not match the lane map. If that describes your project, send the transceiver model, interface, link distance and breakout requirement, and we can work back from the datasheet to a custom fiber optic cable assembly with matching polarity and insertion-loss test records.